LibM0M1.fth (2972B)
1 \ ARM Cortex CPU specific library code 2 3 (( 4 Copyright (c) 2000..2003, 2010 5 MicroProcessor Engineering 6 133 Hill Lane 7 Southampton SO15 5AF 8 England 9 10 tel: +44 (0)23 8063 1441 11 fax: +44 (0)23 8033 9691 12 net: mpe@mpeforth.com 13 tech-support@mpeforth.com 14 web: www.mpeforth.com 15 16 From North America, our telephone and fax numbers are: 17 011 44 23 8063 1441 18 011 44 23 8033 9691 19 20 21 To do 22 ===== 23 24 Change history 25 ============== 26 20100204 MPE002 Cortex conversion. 27 20040211 MPE001 Added @ON and @OFF. 28 )) 29 30 only forth definitions 31 decimal 32 33 \ ========= 34 \ *! libm0m1 35 \ *T ARM Cortex specific library code 36 \ ========= 37 \ *P The code in *\i{Cortex/LibCortex.fth} is conditionally 38 \ ** compiled by the following code fragment to be found at the 39 \ ** end of many control files. 40 \ *E libraries \ to resolve common forward references 41 \ ** include %CpuDir%/LibCortex 42 \ ** include %CommonDir%/library 43 \ ** end-libs 44 \ *P Each definition in a library file is surrounded by 45 \ ** a phrase of the form: 46 \ *C [required] <name> [if] : <name> ... ; [then] 47 \ *P The phrase *\fo{[REQUIRED] <name>} returns true if *\fo{<name>} 48 \ ** has been forward referenced and is still unresolved. 49 \ ** The code between *\fo{LIBRARIES} and *\fo{END-LIBS} is repeatedly 50 \ ** processed until no further references are resolved. 51 52 53 \ ****************** 54 \ *S I/O initialisation 55 \ ****************** 56 57 [required] init-io [if] 58 : init-io \ addr -- 59 \ *G Copy the contents of the I/O set up table to an I/O device. 60 \ ** Each element of the table is of the form addr (cell) followed 61 \ ** by data (cell). The table is terminated by an address of 0. 62 \ ** A table of a single 0 address performs no action. 63 begin 64 dup @ 65 while 66 dup 2@ ! 2 cells + 67 repeat 68 drop 69 ; 70 [then] 71 72 73 \ ************************** 74 \ *S interrupt enable and disable 75 \ ************************** 76 77 [required] di [if] 78 code di \ -- 79 \ *G Disable interrupts. 80 cps .id .i 81 next, 82 end-code 83 [then] 84 85 [required] ei [if] 86 code ei \ -- 87 \ *G Enable interrupts. 88 cps .ie .i 89 next, 90 end-code 91 [then] 92 93 [required] [i [if] 94 code [I \ R: -- x1 x2 95 \ *G Preserve interrupt/exception status on the return stack, 96 \ ** and disable interrupts/exceptions except reset, NMI and 97 \ ** HardFault. The state is restored by *\fo{I]}. 98 mrs r0, PRIMASK \ get status 99 cps .id .i 100 push .n { r0 } 101 next, 102 end-code 103 [then] 104 105 [required] i] [if] 106 code I] \ R: x1 x2 -- 107 \ *G Restore interrupt status saved by *\fo{[I} from the return 108 \ ** stack. 109 pop .n { r0 } 110 msr PRIMASK r0 111 next, 112 end-code 113 [then] 114 115 116 \ **************** 117 \ *S Miscellaneous 118 \ **************** 119 120 [required] @off [if] 121 : @OFF \ addr -- x 122 \ *G Read cell at addr, and set it to 0. 123 dup @ swap off 124 ; 125 [then] 126 127 [required] @on [if] 128 : @on \ addr -- val 129 \ *G Fetch contents of cell at addr and set it to -1. 130 dup @ swap on 131 ; 132 [then] 133 134 135 \ ====== 136 \ *> ### 137 \ ====== 138