ReprogSTM32F0.ctl (5601B)
1 \ Reprogram STM32 over serial line. 2 3 (( 4 Copyright (c) 2003, 2004, 2005, 2006, 2008, 2010 5 MicroProcessor Engineering 6 133 Hill Lane 7 Southampton SO15 5AF 8 England 9 10 tel: +44 (0)23 8063 1441 11 fax: +44 (0)23 8033 9691 12 net: mpe@mpeforth.com 13 tech-support@mpeforth.com 14 web: www.mpeforth.com 15 16 From North America, our telephone and fax numbers are: 17 011 44 23 8063 1441 18 011 44 23 8033 9691 19 20 21 To do 22 ===== 23 24 Change history 25 ============== 26 20100131 SFP005 Converted for STM32. 27 20100125 SFP004 Converted for LPC17xx 28 20081008 SFP003 Converted for LPC23xx/24xx/28xx 29 20060818 SFP002 Added UART selection. 30 20040809 SFP001 Added equate FULLIAP? 31 20030728 SFP000 First cut 32 )) 33 34 \ ============= 35 \ *! reprogstm32 36 \ *T Reprogramming the STM32 serially 37 \ ============= 38 \ *S Introduction 39 \ *P *\i{ReprogSTM32.ctl} is the control file for the serial 40 \ ** loader which reprograms the on-chip Flash memory. 41 \ ** Because the loader code may itself be replaced, the Flash 42 \ ** programming code is copied into RAM for execution. The only 43 \ ** exit from the code is a reset of the CPU to execute the 44 \ ** newly Flashed program. All interrupts are disabled during 45 \ ** reprogramming, and so polled serial drivers are used. 46 47 \ *P Access to the reprogramming software is defined in 48 \ ** *\i{ReFlash.fth} for the main system code and in 49 \ ** this control file and the two must match. 50 51 \ *P Return is by rebooting the system. The contents of the 52 \ ** internal RAM and Flash are destroyed, therefore any data 53 \ ** that must be preserved should be saved externally to the 54 \ ** chip. 55 56 57 only forth definitions 58 59 60 \ ****************************** 61 \ Define the default directories 62 \ ****************************** 63 64 c" ../../.." setmacro CpuDir 65 c" ../../../.." setmacro CommonDir 66 c" ." setmacro AppDir 67 c" .." setmacro HwDir 68 69 70 \ ********************************************************* 71 \ Turn on the cross compiler and define CPU and log options 72 \ ********************************************************* 73 74 \ file: PROG.log \ uncomment to send log to a file 75 76 CROSS-COMPILE 77 78 only forth definitions \ default search order 79 80 no-log \ uncomment to suppress output log 81 rommed \ split ROM/RAM target 82 interactive \ enter interactive mode at end 83 +xrefs \ enable cross references 84 align-long \ code is 32bit aligned 85 Cortex-M0 \ Cortex-M processor type 86 no-heads \ do not generate heads 87 no inlining \ saves some space 88 -ram-table \ saves some space 89 +LeafCalls \ saves some space 90 +SaveCdataOnly \ no data area image files 91 92 0 equ false 93 false not equ true 94 95 (( 96 $2000:0000 $2000:0BFF cdata section ReprogSTM32 97 interpreter 98 : prog ReprogSTM32 ; 99 target 100 $2000:0C00 $2000:0C7F idata section PROGd 101 $2000:0C80 $2000:0CFF udata section PROGu 102 $2000:0D00 $2000:0DFF udata section Xbuff \ 256 byte Xmodem buffer 103 sec-base equ Xbase \ base address of buffer 104 sec-len equ Xlen \ length of buffer 105 Xbase Xlen + equ Xtop \ top of buffer 106 )) 107 $2000:0000 $2000:09FF cdata section ReprogSTM32F0 108 interpreter 109 : prog ReprogSTM32F0 ; 110 target 111 $2000:0A00 $2000:0A1F idata section PROGd 112 $2000:0A20 $2000:0A3F udata section PROGu 113 $2000:0A40 $2000:0ABF udata section Xbuff \ 128 byte Xmodem buffer 114 sec-base equ Xbase \ base address of buffer 115 sec-len equ Xlen \ length of buffer 116 Xbase Xlen + equ Xtop \ top of buffer 117 118 PROG PROGd PROGu CDATA \ use Code for HERE , and so on 119 120 121 \ ******************** 122 \ *S Items of interest 123 \ ******************** 124 \ *P The stacks have already been set up by the calling program. 125 126 \ *[ 127 include %CpuDir%\CM0def \ Cortex CPU equates 128 include %CpuDir%\sfrSTM32F072 \ Special function registers 129 \ *] 130 131 l: CLD1 \ -- addr 132 \ *G Filled in later with the xt of *\fo{ReprogFlash} 133 0 , 134 l: CLD_CopyFlash \ -- addr 135 \ *G Filled in later with the xt of *\fo{CopyFlash} 136 0 , 137 l: CLD_UART \ -- addr 138 \ *G Filled in later with 0 or UART base address to use. 139 \ ** If set to 0, the default is UART1. This allows the calling 140 \ ** application to select which UART to use. 141 0 , 142 l: CLD_clockspeed \ -- addr 143 \ *G Contains the clock speed to use. Filled in by the calling 144 \ ** application. Default is 48 MHz. 145 48 Mhz , 146 l: CLD_/Flash \ -- addr 147 \ *G Flash size in bytes. Default is 128kb 148 #128 kb , 149 l: CLD_/FlashPage \ -- addr 150 \ *G Size of each page in the flash. Default is 2 kb. 151 2 kb , 152 153 $0800:0000 equ FlashBase \ -- addr 154 \ *G Base address of the Flash. 155 156 compiler 157 : prog-speed \ -- hz 158 CLD_clockspeed @ ; 159 : /Flash \ -- len 160 CLD_/Flash @ ; 161 : /FlashPage \ -- len 162 CLD_/FlashPage @ ; 163 target 164 165 \ *[ 166 include %AppDir%\primitives \ Forth primitives from CodeM0M1.fth 167 include %AppDir%\MinSerSTM32p \ polled serial line driver 168 include %AppDir%\delays \ software delays 169 include %CpuDir%\Drivers\rebootSTM32 \ reboot 170 \ *] 171 172 synonym ser-emit emit 173 \ *G A synonym required by the Xmodem code. 174 synonym ser-key? key? 175 \ *G A synonym required by the Xmodem code. 176 synonym ser-key key 177 \ *G A synonym required by the Xmodem code. 178 179 \ *[ 180 include %AppDir%\MinXmodemRx \ Xmodem receiver 181 include %AppDir%\ReprogApp \ Application 182 \ *] 183 184 185 \ ******* 186 \ The end 187 \ ******* 188 189 make-turnkey ReprogFlash \ start up action 190 \ *G Define the action of the reprogramming code. 191 ' CopyFlash CLD_CopyFlash ! 192 \ *G Define the action of the Flash copy code. 193 194 decimal 195 196 FINIS 197 198 199 \ ****** 200 \ *> ### 201 \ ******