delays.fth (1545B)
1 \ DELAYS.FTH - software timed delay routines 2 3 (( 4 Copyright (c) 2004, 2010 5 MicroProcessor Engineering 6 133 Hill Lane 7 Southampton SO15 5AF 8 England 9 10 tel: +44 (0)23 8063 1441 11 fax: +44 (0)23 8033 9691 12 net: mpe@mpeforth.com 13 tech-support@mpeforth.com 14 web: www.mpeforth.com 15 16 From North America, our telephone and fax numbers are: 17 011 44 23 8063 1441 18 011 44 23 8033 9691 19 20 21 To do 22 ===== 23 24 Change history 25 ============== 26 20100204 SFP003 Changed timebase unit to 10us to allow for UARTs 27 without FIFOs. 28 20100126 SFP002 Converted to clock speed from table. 29 20041007 MPE001 Corrected clocks/iteration in UDELAY and >UDELAY. 30 )) 31 32 \ ========= 33 \ *! delays 34 \ *T Delay routines 35 \ ========= 36 \ *P The short delays are produced by software delay routines 37 \ ** which take five clock cycles per iteration on a 38 \ ** Cortex-M3 core with no wait states. This number was for 39 \ ** build 428 of the VFX compiler. When more optimisation is added 40 \ ** to the compiler the number of cycles per iteration may 41 \ ** change. 42 43 \ *P The delay routines below extract the clock speed from the 44 \ ** entry table in the control file. 45 46 : delay10us \ -- 47 \ *G Waits for 10 microseconds. 48 CLD_clockspeed @ 5 #100000 * u/ 49 begin 1- dup 0= until drop \ 5 clocks per iteration 50 ; 51 52 : delay1ms \ -- 53 \ *G Waits for 1 ms. 54 CLD_clockspeed @ 5 #1000 * u/ 55 begin 1- dup 0= until drop \ 5 clocks per iteration 56 ; 57 58 : ms \ ms -- 59 \ *G Wait the given number of milliseconds. 60 begin 61 delay1ms 62 1- dup 0= 63 until 64 drop 65 ; 66