StackDef.fth (3524B)
1 \ StackDef.fth - default stack layout 2 3 (( 4 Copyright (c) 2010 5 MicroProcessor Engineering 6 133 Hill Lane 7 Southampton SO15 5AF 8 England 9 10 tel: +44 (0)23 8063 1441 11 fax: +44 (0)23 8033 9691 12 net: mpe@mpeforth.com 13 tech-support@mpeforth.com 14 web: www.mpeforth.com 15 16 From North America, our telephone and fax numbers are: 17 011 44 23 8063 1441 18 011 44 23 8033 9691 19 20 21 To do 22 ===== 23 24 Change history 25 ============== 26 )) 27 28 decimal 29 30 \ =========== 31 \ *! stackdef 32 \ *T Default stack layout 33 \ =========== 34 \ *P The code in *\i{StackDef.fth} provides the default task 35 \ ** and stack reservations. It assumes that you will be using 36 \ ** tasks and high-level Forth interrupt handlers. 37 38 \ *P The Cortex-M3 has two stack pointers, SP_main and SP_process. 39 \ ** These are accessed as register R13 which is is also known as 40 \ ** RSP in the Forth assembler. After reset, SP_main is used and 41 \ ** SP_main is always used for exceptions/interrupts. To reduce 42 \ ** the overall RAM requirement, the initialisation code switches 43 \ ** the main task and all subsequent tasks) to use SP_process, 44 \ ** but leaves the CPU in privileged mode. 45 46 47 \ *************************** 48 \ *S Task area and Stack equates 49 \ *************************** 50 \ *P A task consists of three areas 51 \ *( 52 \ *B USER area, pointed to by UP. 53 \ *B Data stack, pointed to by PSP (usually R12). 54 \ *B Return stack, pointed to by RSP (always R13). 55 \ *) 56 \ *P The sizes of these areas are defined by the equates 57 \ ** *\fo{UP-SIZE}, *\fo{SP-SIZE}, and *\fo{RP-SIZE} in 58 \ ** the control file. 59 60 \ *P The return stack must be the lowest of RSP, PSP and UP 61 \ ** in order to permit fast interrupt nesting. In order for 62 \ ** the task initialisation code in *\i{MultiCortex.fth} to 63 \ ** work correctly, *\fo{INIT-U0} must be the highest. 64 65 rp-size sp-size + equ TASK-U0 \ -- offset 66 \ *G Initial offset of user area from the task base address. 67 rp-size sp-size + equ TASK-S0 \ -- offset 68 \ *G Initial offset of data stack from the task base address. 69 rp-size equ TASK-R0 \ -- offset 70 \ *G Initial offset of return stack from the task base address. 71 72 task-size reserve equ INIT-T0 \ -- addr 73 \ *G Base of main task area. 74 init-t0 task-u0 + equ INIT-U0 \ -- addr 75 \ *G Base of main user area 76 init-t0 task-s0 + equ INIT-S0 \ -- addr 77 \ *G Top of main data stack 78 init-t0 task-r0 + equ INIT-R0 \ -- addr 79 \ *G Top of main return stack. The set code sets this as the 80 \ ** initial value of R13/SP_process. 81 82 \ *P All tasks run in privileged Thread mode. Defining additional 83 \ ** tasks reserves RAM for the tasks. 84 85 [defined] tib-len [if] 86 tib-len reserve equ INIT-TIB \ -- addr 87 \ Standalone Forths require a terminal input buffer. *\fo{INIT-TIB} 88 \ ** is defined if the equate *\fo{TIB-LEN} is defined. 89 [then] 90 91 92 \ *************************************** 93 \ *S Exception/Interrupt stack allocation 94 \ *************************************** 95 \ *P The amount of RAM required for exception handlers is 96 \ ** affected by the number of nexsted interrupt handlers 97 \ ** and the number of SVC/SWI calls that can be nested. 98 99 \ IRQ stacks ; nestable up to #IRQs 100 \ We assume that high level interrupt handlers will be used 101 102 #IRQs #SVCs + task-size * equ IRQ_STACK_SIZE \ -- len 103 \ *G Total RAM required for exception/interrupt handlers stacks. 104 105 0 reserve equ INT_STACK_TOP \ -- addr 106 \ *G Top of exception stacks 107 IRQ_STACK_SIZE reserve equ INT_STACK_BASE 108 \ *G Bottom of exception stacks 109 110 111 \ ====== 112 \ *> ### 113 \ ====== 114 115 decimal 116