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gpioSTM32F0xx.fth (6967B)


      1 \ gpioSTM32F0xx.fth - easy access to STM32F0 GPIO pins.
      2 
      3 ((
      4 Copyright (c) 2011, 2014
      5 MicroProcessor Engineering
      6 133 Hill Lane
      7 Southampton SO15 5AF
      8 England
      9 
     10 tel:   +44 (0)23 8063 1441
     11 fax:   +44 (0)23 8033 9691
     12 email: mpe@mpeforth.com
     13        tech-support@mpeforth.com
     14 web:   http://www.mpeforth.com
     15 Skype: mpe_sfp
     16 
     17 From North America, our telephone and fax numbers are:
     18        011 44 23 8063 1441
     19        011 44 23 8033 9691
     20        901 313 4312 (North American access number to UK office)
     21 
     22 
     23 To do
     24 =====
     25 
     26 Change history
     27 ==============
     28 20120326 SFP004 Conversion for STM32F0.
     29 20120210 SFP003 Corrected ISFUNCTION.
     30 20120130 SFP002 Refactored, added pin speed.
     31 20111201 SFP001 Adapted from Kinetis version.
     32 ))
     33 
     34 only forth definitions
     35 decimal
     36 
     37 \ ===========
     38 \ *> drivers
     39 \ *S STM32 GPIO utilities
     40 \ ===========
     41 \ *P The code in *\i{CortexLite\Drivers\gpioSTM32.fth} provides
     42 \ ** utility words for accessing GPIO pins on a bit by bit basis
     43 \ ** for the STM32 CPUs.
     44 \ ** The code is written for ease of use rather than performance.
     45 
     46 
     47 \ ********************
     48 \ *N Defining I/O pins
     49 \ ********************
     50 \ *P FIO/GPIO acess is defined using a bit number. Bits 0..31 form
     51 \ ** P0.0 to P0.31, bits 32..63 form P1.0 to P1.31 and so on.
     52 \ ** Although ST name their ports from A, here we number
     53 \ ** them from 0. Note also that ST usually only provide 16
     54 \ ** I/O bits per port. Later we define constants for the port
     55 \ ** numbers.
     56 
     57 $0400 equ /Port		\ -- u
     58 \ *G Separation in memory between GPIO port base addresses.
     59 #10 equ PortShift	\ -- u
     60 \ *\fo{/Port} as a shift.
     61 
     62 target-only
     63 : PIO:		\ port# bit# -- ; -- struct
     64 \ *G Define a port I/O bit by name. For example
     65 \ *C   3 12 pio: LED1   \ PD.12
     66 \ *C   PD 12 pio: LED1  \ PD.12
     67 \ *P defines an I/O bit on GPIOD, bit 12 as *\fo{LED1}. At run
     68 \ ** time, the I/O bit structure is returned.
     69   create				\ -- port# bit#
     70     over PortShift lshift _GPIOA + ,	\ pins base
     71     1 over lshift ,			\ bit mask
     72     swap 5 lshift or ,			\ I/O bit number
     73 ;
     74 host&target
     75 interpreter
     76 : PIO:		\ port# bit# -- ; -- struct
     77   create
     78     over PortShift lshift _GPIOA + ,	\ pins base
     79     1 over lshift ,			\ bit mask
     80     swap 5 lshift or ,			\ I/O bit number
     81 ;
     82 target
     83 
     84 \ *P Define the ports as constants. So that we can use names
     85 \ ** rather than numbers, e.g.
     86 \ *C   PD 12 pio: LED1   \ PD.12
     87 \ *[
     88 0 constant PA
     89 1 constant PB
     90 2 constant PC
     91 3 constant PD
     92 4 constant PE
     93 5 constant PF
     94 \ *]
     95 
     96 
     97 \ ******************
     98 \ *N GPIO pin access
     99 \ ******************
    100 
    101 : setPin	\ struct --
    102 \ *G Set the pin high.
    103   2@ gpioBSRRL + w!  ;
    104 
    105 : clrPin	\ struct --
    106 \ *G Set the pin low.
    107   2@ gpioBSRRH + w!  ;
    108 
    109 : getPin	\ struct -- 0/1
    110 \ *G Read the pin state.
    111   2@ gpioIDR + @ and 0<> 1 and
    112 ;
    113 
    114 
    115 \ ***********************
    116 \ *N IO pin configuration
    117 \ ***********************
    118 
    119 internal
    120 : mode>mask	\ mode -- modemask
    121 \ Repeats the two bit mask 16 times.
    122   3 and
    123   dup 2 lshift or			\ 4 bits
    124   dup 4 lshift or			\ 8 bits
    125   dup 8 lshift or			\ 16 bits
    126   dup #16 lshift or			\ 32 bits
    127 ;
    128 
    129 : >2bitmask	\ bit# -- bitmask
    130 \ Converts a bit number 0..15 to a 2 bit mask for a 32 bit word,
    131   $0F and 2* $03 swap lshift  ;
    132 
    133 : mode>valmask	\ mode bit# -- val bitmask
    134 \ Convert a two bit mode and bit number (0..15) into a value and
    135 \ bitmask to use with setMask.
    136   swap mode>mask 			\ -- bit# modemask
    137   swap >2bitmask			\ -- modemask bitmask
    138   tuck and swap 			\ -- val bitmask
    139 ;
    140 
    141 : ms>vba	\ mode struct -- val bitmask *gpio
    142 \ Given a two bit mask and a structure, return the value, bitmask,
    143 \ and base address for a SetMask operation.
    144   tuck  2 cells + @ $0F and		\ -- struct mode bit#
    145   mode>valmask				\ -- struct val bitmask
    146   rot @					\ -- val bitmask *gpio
    147 ;
    148 external
    149 
    150 : isPinMode	\ mode struct --
    151 \ *G Sets the GPIO mode for a pin. Use with the constants below.
    152   ms>vba gpioMODER + setMask		\ set pin's bits in MODER
    153 ;
    154 
    155 internal
    156 : af#>mask	\ mode -- afbits
    157 \ Repeats a four bit mask 8 times.
    158   $0F and
    159   dup 4 lshift or			\ 8 bits
    160   dup 8 lshift or			\ 16 bits
    161   dup #16 lshift or			\ 32 bits
    162 ;
    163 
    164 : >4bitmask/off	\ bit# -- bitmask offset
    165 \ Converts a bit number 0..15 to a 4 bit mask and offset for a
    166 \ 32 bit word,
    167   dup 7 and 4* $0F swap lshift		\ -- bit# mask
    168   swap $08 and 1 rshift			\ -- mask offset
    169 ;
    170 
    171 : af#>valmask	\ af# bit# -- val mask offset
    172 \ Convert a 4 bit alternate function number and bit number
    173 \ (0..15) into a value and bitmask to use with setMask.
    174   swap af#>mask 			\ -- bit# afmask
    175   swap >4bitmask/off 			\ -- afmask bitmask offset
    176   >r  tuck and swap  r>			\ -- val bitmask offset
    177 ;
    178 external
    179 
    180 \ *P Pins can be in one of four modes, 0..3.
    181 
    182 0 constant InputMode	\ -- mode#
    183 \ *G The pin is an input.
    184 1 constant OutputMode	\ -- mode#
    185 \ *G The pin is an output.
    186 2 constant AFmode	\ -- mode#
    187 \ *G The pin is for one of the alternate function modes.
    188 3 constant AnalogMode	\ -- mode#
    189 \ *G The pin is an analogue pin.
    190 
    191 : isInput	\ struct --
    192 \ *G Set the pin to GPIO mode and input.
    193   InputMode swap isPinMode
    194 ;
    195 
    196 : isOutput	\ struct --
    197 \ *G Set the pin as an output.
    198   OutputMode swap isPinMode
    199 ;
    200 
    201 : isFunction	\ af# struct --
    202 \ *G Set the pin to be used with one of the alternate functions.
    203   >r
    204   AFmode r@ isPinMode			\ uses an alternate function.
    205   r@ 2 cells + @ $0F and af#>valmask	\ -- val mask offset ; -- R: struct
    206   r> @ gpioAFRL + + setMask		\ set bits in AFRL or AFRH
    207 ;
    208 
    209 : isAnalog	\ struct --
    210 \ *G Set the pin as an analog pin.
    211   AnalogMode swap isPinMode
    212 ;
    213 
    214 : isPinOD	\ 0/1 struct --
    215 \ *G Enable (nz) or disable (0) the open drain driver.
    216   swap if
    217     2@ gpioOTYPER + or!
    218   else
    219     2@ gpioOTYPER + bic!
    220   endif
    221 ;
    222 
    223 : isPinPuPd	\ mode struct --
    224 \ *G Sets the pull up/down for a pin.
    225   ms>vba gpioPUPDR + setMask		\ set pin's bits in PUPDR
    226 ;
    227 
    228 : NotPulled	\ struct --
    229 \ *G No pull up or pull down.
    230   0 swap isPinPuPd  ;
    231 
    232 : PulledUp	\ struct --
    233 \ *G Enable the pin pull up resistor.
    234   1 swap isPinPuPd  ;
    235 
    236 : PulledDown	\ struct --
    237 \ *G Enable the pin pull down resistor.
    238   2 swap isPinPuPd  ;
    239 
    240 : isPinSpeed	\ mode struct --
    241 \ *G Sets the output speed for a pin according to the constants
    242 \ ** below.
    243   ms>vba gpioOSPEEDR + setMask		\ set pin's bits in PUPDR
    244 ;
    245 
    246 0 constant LowSpeed	\ -- mask
    247 \ *G The default is 2MHz, low speed.
    248 1 constant MediumSpeed	\ -- mask
    249 \ *G 10 MHz, medium speed.
    250 3 constant HighSpeed	\ -- mask
    251 \ *G 50 MHz, fast speed.
    252 
    253 : initGPIO	\ --
    254 \ *G Enable clocks to all GPIO ports and take them out of reset.
    255 \ ** performed in the cold chain.
    256   $007E:0000 _RCC  2dup rccAHBen + or!  rccAHBrst + bic!
    257 ;
    258 ' initGPIO atCold
    259 
    260 
    261 \ ******************************************
    262 \ *N Test code for STM32F072 Discovery board
    263 \ ******************************************
    264 
    265 0 [if]
    266 
    267 pa 8 pio: PA8	\ -- struct
    268 \ *G Structure for pin PA8, which can be used as the oscillator
    269 \ ** output MCO.
    270 
    271 : init-mco	\ --
    272 \ *G Initialise PA8 as the MCO output.
    273   $0400:0000 $FF00:0000 _RCC rccCFGR + setMask	\ MCO = system clock
    274   0 PA8 isFunction			\ AF0
    275   PA8 notPulled				\ push-pull
    276   HighSpeed PA8 isPinSpeed		\ 50 MHz
    277 ;
    278 
    279 [then]
    280 
    281 
    282 \ ======
    283 \ *> ###
    284 \ ======
    285 
    286 decimal